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 【ASIC Design/Integration/Verication/Physical Design/DFT】芯片公司 |
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rongchris
头衔: 海归上士
性别:  年龄: 40
加入时间: 2010/01/06
文章: 34
海归分: 1261
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作者：rongchris 在 海归招聘 发贴, 来自【海归网】 http://www.haiguinet.com
~知名芯片公司【ASIC Design/Integration/Verication/Physical Design/DFT】职位更新~
NEW！新职位
Hardware Platform Design Engineer
PREFERRED EXPERIENCE:
1. 6 + years experience in mobile/PC/ motherboard/systems development or sustaining.
2. Strong hardware design skills as measured by successful delivery of digital designs.
3. Knowledge of design flow, product development processes, reliability verification, validation and compatibility testing.
4. Experience in Microprocessor based motherboard designs in the PC Desktop, Mobile and Server markets.
5. Familiar with PC, mobile or server architecture.
6. Proficient with the Windows Operating System.
7. Bachelor or above degree in an Engineering or Science area. Master degree is a plus
8. Ability to clearly communicate technical ideas across disciplines.
9. Proficient English and Mandarin (listening, writing and speaking).
10. Strong passion for achievement and career development.
11. Self-motivated and able to work independently and effectively to meet time requirements.
职位一
Senior Design Engineer for Video Codec
Preferred Experience:
- Major in EE and have Master degree or higher
- 3 years beyond working experience on ASIC design
- Must have strong background on video encoding/decoding algorithms
- Must be proficient in Verilog coding, debugging and modeling
- Must be skilled in ASIC design flow, such as synthesis, DFT, timing analysis, ECO etc.
- Must be skilled in mainstream EDA tools for design and simulation such as ncsim/vcs, RC/DC, PT, Formality/LEC and DFT.
- Must be familiar with verification methodologies for from block level to SoC level.
- Should be familiar with shell/perl/tcl programming in linux OS.
- Should be familiar with P&R and Manufacture tech.
- Good English hearing, speaking, reading and writing capabilities.
- Will be a big plus if having tape‐out experience.
- Will be a plus if having C/C++, matlab experience.
职位二
Sr/MTS ASIC Design/Integration Engineer
PREFERRED EXPERIENCE:
- MSEE or PhD and CGPA of 8.0 out of 10.0 or higher with minimum 2-3 years of ASIC design and integration experience is required.
- Familiar with complex high speed ASIC Design process.
- Relevant experience in Graphics, Memory Controller (DDR, DDR2, DDR3), Video, Microprocessor Design, SOC design is a plus.
- Relevant experience in bus protocol USB/PCI/PCIE design is a plus.
- Relevant experience in chip level design/integration, DFT, memBIST, Memory Compiler, STA is a plus.
- Strong logic design, verification and debugging skills.
- Exposure to Digital systems and VLSI design, Computer Architecture, Computer Arithmetic, and C/C++ programming languages, CMOS transistors and circuits is optional.
- Good communications skills and ability and desire to work as a team player are a must.
职位三
Sr. /Jr. ASIC Design Verification Engineer
PREFERRED EXPERIENCE:
- MSEE or PhD and CGPA of 8.0 out of 10.0 or higher are required.
- Familiar with complex high speed ASIC Design process.
- Strong C/C++/System Verilog and HDL/RTL programming skills is a must.
- Relevant experience in Graphics, Memory Controller (DDR, DDR2, DDR3), Video, Microprocessor Design, SOC design and bus protocol PCIE is a plus.
- Strong logic analysis, verification, debugging and problem-solving skills.
- Relevant experience in Design for verification (Assertion based Verification, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.) is a plus.
- Relevant experience in Hardware emulation, System Performance modeling and analysis is an asset.
- Good communications skills and ability and desire to work as a team player are a must.
职位四
Sr. Physical Design Engineer
PREFERRED EXPERIENCE:
- PhD with 1+ years of industrial experience or MSEE with 3+ years of industrial experience in ASIC design
- Expertise in place and routing, signal integrity, power analysis, CTS design, DFT, design rule and connectivity verification, timing closure.
- Successfully gone through complete product development cycle. Good analytical and debugging skills
- Good listening, writing and speaking English.
- Good communication skills, strong interpersonal skills and the flexibility. Dedicated, hard working and good team player
- Familiar with Back-End (physical design) EDA tools (synopsys, cadence, magma)
- Familiar with Front-End EDA tools or circuit design is a plus
- Familiar with Unix/Linux environment and good at scripts.
职位五
DFT Engineer
PREFERRED EXPERIENCE:
- Master of EE or above. 2+ years DFT experience.
- Prove million gates DFT project experience, and can handle complex DFT design independently.
- Knowledge of Digital design, IC design methodology and Concepts of design for test.
- Be familiar with verilog language
- Be familiar with Unix and TCL, shell , Perl scripts.
- Strong debug abilities.
- Good English communication skills
- Self-motivated and good team player.
以上职位base地点均在上海
需求量比较大
有兴趣的可直接发简历到邮箱，或MSN沟通
[email protected]
作者：rongchris 在 海归招聘 发贴, 来自【海归网】 http://www.haiguinet.com
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